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  • 2 days ago
AMD announces industry first CPU to achieve production using TSMC 2nm process technology

AMD has unveiled its next-generation CPU, codenamed "Venice," which will be manufactured using TSMC’s advanced 2nm process node. This chip is designed for EPYC server processors (6th generation) and marks the industry’s first high-performance computing (HPC) chip built on 2nm technology.

Key Highlights:

· Performance Leap: The Venice CPU offers up to 256 cores and a memory bandwidth of 1.6 TB/s, delivering 1.7x the performance of the previous Turin generation.
· New Transistor Architecture: TSMC’s 2nm (N2) process moves from FinFET to Gate-All-Around (GAA) nanosheet transistors, which provide better control over power leakage and improved efficiency.
· AI Focus: According to AMD CEO Dr. Lisa Su, this chip is a major step forward for next-generation AI infrastructure, enabling faster data processing in data centers.
· Production & Roadmap: Initial production is underway in Taiwan, with plans to also manufacture at TSMC’s new facility in Arizona, USA. AMD has also planned another 2nm CPU called "Verano" for the data center market.

This collaboration between AMD and TSMC pushes the limits of semiconductor technology, promising faster, more energy-efficient processors for servers and AI workloads.

AMD Just Changed Everything – First 2nm CPU Revealed!"
· "The Future of AI Computing: AMD’s 2nm ‘Venice’ CPU Explained"

Technical & Informative:

· "AMD & TSMC’s 2nm Breakthrough: Venice CPU Deep Dive"
· "How AMD’s 2nm Chip Beats FinFET: GAA Transistors Explained"

News-Style:

· "World’s First 2nm High-Performance CPU: AMD’s Venice"
· "AMD Leapfrogs Competition with TSMC’s 2nm Technology"

Short & Punchy:

· "AMD 2nm: The Next Big Leap"
· "Venice: AMD’s 256-Core 2nm Beast"

Category

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Tech
Transcript
00:00AMD has unveiled its next generation CPU, codenamed VENIS, which will be manufactured using TSMC's advanced 2nm process node.
00:10This chip is designed for EPYC server processors, 6th generation, and marks the industry's first high-performance computing, HPC chip,
00:21built on 2nm technology.
00:23Key Highlights
00:24Performance Leap
00:26The VENIS CPU offers up to 256 cores and a memory bandwidth of 1.6 terabytes per second, delivering 1
00:34.7 times the performance of the previous Turin generation.
00:38New transistor architecture, TSMC's 2nm, N2, process moves from FINFAT to gate-all-around, GAA, nanosheet transistors, which provide better
00:51control over power leakage and improved efficiency.
00:54AI Focus
00:55According to AMD CEO Dr. Lisa Su, this chip is a major step forward for next-generation AI infrastructure, enabling
01:04faster data processing in data centers.
01:06Production and Roadmap
01:09Production and Roadmap
01:09Initial production is underway in Taiwan, with plans to also manufacture at TSMC's new facility in Arizona, USA.
01:18AMD has also planned another 2nm CPU called Verano for the data center market.
01:24This collaboration between AMD and TSMC pushes the limits of semiconductor technology, promising faster, more energy-efficient processors for servers
01:35and AI workloads.
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